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View all View all templatesCaptive Portal Authentication Flow
A network flow diagram for captive portal authentication in an educational institution — showing how student devices move through 802.1X/RADIUS authentication, dynamic VLAN assignment, and captive portal fallback. Two paths are modeled: authenticated devices go straight to the student VLAN; unauthenticated BYOD devices hit the quarantine VLAN and get redirected to the portal. Built for IT administrators and network architects who need to document or communicate their access control architecture.
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Julien Robert, CTO
Business Planning Mind Map
Organize every piece of your business strategy in one visual space. This template breaks down business planning into clear branches — from company profile and financials to market analysis and competitive positioning — making it easier to see how different aspects of your business connect. It’s a quick way to align stakeholders, prepare for investor meetings, or align your team around priorities.
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Fibonacci Communication Development Model
A theoretical framework mapping the Fibonacci sequence backwards onto the evolution of communication – from an infant's first silence through language acquisition, social scaling, and civilizational complexity. Six subgraphs layer the model: core principles, linguistic development stages, trans-scalar social dynamics, civilizational lifecycle, diagnostic protocols, safeguarding rules, and ultimate insights. Built for researchers, systems thinkers, and educators exploring how communication patterns replicate across scales.
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State-Machine Based Decimation Filter for LiDAR UART Streaming
A state machine for reading a continuous stream of 5-byte UART messages from a LiDAR scanner into an embedded system — in real time, with configurable decimation. Rather than capturing everything and filtering later, this design processes bytes as they arrive and skips every Mth message on the fly. Five states handle the full lifecycle: idle, pattern detection, offset alignment, recording, and skipping. Built for embedded systems engineers, robotics researchers, and anyone working with sensor data pipelines where memory is constrained and throughput matters.
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